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Systolic implementation of linear-phase FIR filters
H. Abdelhameed, El-Guibaly F.,
Published in Institute of Electrical and Electronics Engineers Inc.
Pages: 680 - 683
A systematic method is used for mapping linear-phase FIR filter algorithms onto systolic hardware. The method is based on the z-domain characterization of the required filter and yields filter structures that are modular and pipelined. A special processor module is presented which performs an add-multiply-accumulate operation in the same time as a simple multiplier. © 1993 IEEE.
About the journal
JournalData powered by TypesetCanadian Conference on Electrical and Computer Engineering
PublisherData powered by TypesetInstitute of Electrical and Electronics Engineers Inc.
Open AccessNo