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Efficient systolic implementation of fixed-point state-space digital filter
, El-Guibaly F., Agathoklis P.
Published in Institute of Electrical and Electronics Engineers Inc.
Pages: 39 - 42
We present an efficient systolic implementation for N-order state-space IIR digital filters. The proposed systolic architecture provides an excellent performance in terms of area and speed. A comparison between the suggested systolic architecture and two other conventional architectures is also presented. © 1993 IEEE.
About the journal
JournalData powered by TypesetCanadian Conference on Electrical and Computer Engineering
PublisherData powered by TypesetInstitute of Electrical and Electronics Engineers Inc.
Open AccessNo