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Digital implementation of artificial neural networks: From VHDL description to FPGA implementation
N. Lzeboudjen, , S. Titri, H. Boumeridja
Published in Springer Verlag
1999
Volume: 1607
   
Pages: 139 - 148
Abstract
This paper deals with a top down design methodology of an artificial neural network (ANN) based upon parametric VHDL description of the network. To come off early in the design process a high regular architecture was achieved. Then, the VHDL parametric description of the network was realized. The description has the advantage of being generic, flexible and can be easily changed at the user demand. To validate our approach, an ANN for electrocardiogram (ECG) arrhythmia's classification is passed through a synthesis tool, GALILEO, for FPGA implementation. © Springer-Verlag Berlin Heidelberg 1999.