Skip to main navigation Skip to search Skip to main content

VLSI array processors implementation of block-state IIR digital filters

  • University of Victoria BC

Research output: Contribution to journalConference articlepeer-review

1 Scopus citations

Abstract

In this paper, an efficient (in the AT and AT2 senses) systolic implementation of state-space realization of the IIR digital filters is presented. The technique used is based on block-state description in which the state update matrix is full. The new implementation has significantly reduced number of processor elements while simultaneously maintaining a high input sampling rate.

Original languageEnglish
Pages (from-to)267-270
Number of pages4
JournalProceedings - IEEE International Symposium on Circuits and Systems
Volume4
StatePublished - 1994
Externally publishedYes
EventProceedings of the 1994 IEEE International Symposium on Circuits and Systems. Part 3 (of 6) - London, England
Duration: 30 May 19942 Jun 1994

Fingerprint

Dive into the research topics of 'VLSI array processors implementation of block-state IIR digital filters'. Together they form a unique fingerprint.

Cite this