VLSI array processor implementation of quasi-block state-space IIR digital filters

E. Abdel-Raheem; A. Tawfik

VLSI array processor implementation of quasi-block state-space IIR digital filters

E. Abdel-Raheem
, A. Tawfik

Ain Shams University

Research output: Contribution to conference › Paper › peer-review

Abstract

A new array processor implementation of IIR digital filter is proposed with high input sampling rate which is not limited by the speed of the processor elements involved. The proposed implementation is based on the quasi-block state-space description of IIR digital filter corresponding to the case of parallel combination of second-order sections. Performance comparison (in terms of hardware complexity and speed) of the proposed implementation with another existing implementation is also presented.

Original language	English
Pages	C2
State	Published - 1998
Externally published	Yes
Event	Proceedings of the 1998 15th National Radio Science Conference (NRSC '98) - Cairo, Egypt Duration: 24 Feb 1998 → 26 Feb 1998

Conference

Conference	Proceedings of the 1998 15th National Radio Science Conference (NRSC '98)
City	Cairo, Egypt
Period	24/02/98 → 26/02/98

Cite this

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title = "VLSI array processor implementation of quasi-block state-space IIR digital filters",

abstract = "A new array processor implementation of IIR digital filter is proposed with high input sampling rate which is not limited by the speed of the processor elements involved. The proposed implementation is based on the quasi-block state-space description of IIR digital filter corresponding to the case of parallel combination of second-order sections. Performance comparison (in terms of hardware complexity and speed) of the proposed implementation with another existing implementation is also presented.",

author = "E. Abdel-Raheem and A. Tawfik",

year = "1998",

language = "English",

pages = "C2",

note = "Proceedings of the 1998 15th National Radio Science Conference (NRSC '98) ; Conference date: 24-02-1998 Through 26-02-1998",

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TY - CONF

T1 - VLSI array processor implementation of quasi-block state-space IIR digital filters

AU - Abdel-Raheem, E.

AU - Tawfik, A.

PY - 1998

Y1 - 1998

N2 - A new array processor implementation of IIR digital filter is proposed with high input sampling rate which is not limited by the speed of the processor elements involved. The proposed implementation is based on the quasi-block state-space description of IIR digital filter corresponding to the case of parallel combination of second-order sections. Performance comparison (in terms of hardware complexity and speed) of the proposed implementation with another existing implementation is also presented.

AB - A new array processor implementation of IIR digital filter is proposed with high input sampling rate which is not limited by the speed of the processor elements involved. The proposed implementation is based on the quasi-block state-space description of IIR digital filter corresponding to the case of parallel combination of second-order sections. Performance comparison (in terms of hardware complexity and speed) of the proposed implementation with another existing implementation is also presented.

UR - https://www.scopus.com/pages/publications/0032296599

M3 - Paper

AN - SCOPUS:0032296599

SP - C2

T2 - Proceedings of the 1998 15th National Radio Science Conference (NRSC '98)

Y2 - 24 February 1998 through 26 February 1998

ER -

VLSI array processor implementation of quasi-block state-space IIR digital filters

Abstract

Conference

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