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Performance evaluation of FinFET-based FPGA cluster under threshold voltage variation

  • Mohamed Mohie El-Din
  • , Hassan Mostafa
  • , Hossam A.H. Fahmy
  • , Yehea Ismail
  • , Hamdy Abdelhamid
  • Siemens
  • Cairo University
  • Zewail City of Science and Technology

Research output: Chapter in Book/Report/Conference proceedingConference contributionpeer-review

5 Scopus citations

Abstract

The performance of FinFET-based FPGA cluster is evaluated with technology scaling for channel length from 20nm down to 7nm showing the scaling trends of basic performance metrics. The impact of threshold voltage variation, considering die-to-die variations, on the delay, power, and power-delay product is reported after the simulation of a 2-bit adder benchmark. Simulation results show an increasing trend of the average power and power-delay product variations with threshold voltage as we go down with technology node. On the contrary, the delay is showing the least percentage of variations with threshold voltage at the most advanced node of 7nm.

Original languageEnglish
Title of host publicationConference Proceedings - 13th IEEE International NEW Circuits and Systems Conference, NEWCAS 2015
PublisherInstitute of Electrical and Electronics Engineers Inc.
ISBN (Electronic)9781479988938
DOIs
StatePublished - 6 Aug 2015
Externally publishedYes
Event13th IEEE International NEW Circuits and Systems Conference, NEWCAS 2015 - Grenoble, France
Duration: 7 Jun 201510 Jun 2015

Publication series

NameConference Proceedings - 13th IEEE International NEW Circuits and Systems Conference, NEWCAS 2015

Conference

Conference13th IEEE International NEW Circuits and Systems Conference, NEWCAS 2015
Country/TerritoryFrance
CityGrenoble
Period7/06/1510/06/15

Keywords

  • FPGA cluster
  • Nano-scale FinFET
  • Technology scaling
  • threshold voltage variations

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