Abstract
This paper describes an image processing algorithm and its efficient architecture. The proposed architecture is used to process images of microelectrode arrays (MEAs) and micro-wells captured by a microscope camera in a dielectrophoresis (DEP)-based system which consists as well of digital switches for turning the DEP force ‘on’ or ‘off’. The images are processed in order to determine if a neuron has entered any of the micro-wells in which case the corresponding switch turns ‘off’ the DEP force. This process must be in real-time to avoid more than one cell to be loaded in a micro-well. The proposed architecture has been successfully implemented and tested on a Zynq SoC. Results achieved have shown that the system can process one image in 9 ms which meets the minimum real-time requirements of this DEP system.
| Original language | English |
|---|---|
| Pages (from-to) | 4.1-4.7 |
| Journal | International Journal of Simulation: Systems, Science and Technology |
| Volume | 16 |
| Issue number | 3 |
| State | Published - Jun 2015 |
| Externally published | Yes |
Keywords
- Dielectrophoresis
- FPGA
- Microelectrode arrays
- Zynq SoC
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