Efficient systolic implementation of fixed-point state-space digital filter

A. Tawfik; F. El-Guibaly; P. Agathoklis

doi:10.1109/CCECE.1993.332241

Efficient systolic implementation of fixed-point state-space digital filter

A. Tawfik
, F. El-Guibaly
, P. Agathoklis

University of Victoria BC

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

3 Scopus citations

Abstract

We present an efficient systolic implementation for N-order state-space IIR digital filters. The proposed systolic architecture provides an excellent performance in terms of area and speed. A comparison between the suggested systolic architecture and two other conventional architectures is also presented.

Original language	English
Title of host publication	Proceedings of Canadian Conference on Electrical and Computer Engineering, CCECE 1993
Publisher	Institute of Electrical and Electronics Engineers Inc.
Pages	39-42
Number of pages	4
ISBN (Electronic)	0780314433
DOIs	https://doi.org/10.1109/CCECE.1993.332241
State	Published - 1993
Externally published	Yes
Event	1993 Canadian Conference on Electrical and Computer Engineering, CCECE 1993 - Vancouver, Canada Duration: 14 Sep 1993 → 17 Sep 1993

Publication series

Name	Canadian Conference on Electrical and Computer Engineering
ISSN (Print)	0840-7789

Conference

Conference	1993 Canadian Conference on Electrical and Computer Engineering, CCECE 1993
Country/Territory	Canada
City	Vancouver
Period	14/09/93 → 17/09/93

Access to Document

10.1109/CCECE.1993.332241

Cite this

Tawfik, A., El-Guibaly, F., & Agathoklis, P. (1993). Efficient systolic implementation of fixed-point state-space digital filter. In Proceedings of Canadian Conference on Electrical and Computer Engineering, CCECE 1993 (pp. 39-42). Article 332241 (Canadian Conference on Electrical and Computer Engineering). Institute of Electrical and Electronics Engineers Inc.. https://doi.org/10.1109/CCECE.1993.332241

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title = "Efficient systolic implementation of fixed-point state-space digital filter",

abstract = "We present an efficient systolic implementation for N-order state-space IIR digital filters. The proposed systolic architecture provides an excellent performance in terms of area and speed. A comparison between the suggested systolic architecture and two other conventional architectures is also presented.",

author = "A. Tawfik and F. El-Guibaly and P. Agathoklis",

note = "Publisher Copyright: {\textcopyright} 1993 IEEE.; 1993 Canadian Conference on Electrical and Computer Engineering, CCECE 1993 ; Conference date: 14-09-1993 Through 17-09-1993",

year = "1993",

doi = "10.1109/CCECE.1993.332241",

language = "English",

series = "Canadian Conference on Electrical and Computer Engineering",

publisher = "Institute of Electrical and Electronics Engineers Inc.",

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address = "United States",

}

Tawfik, A, El-Guibaly, F & Agathoklis, P 1993, Efficient systolic implementation of fixed-point state-space digital filter. in Proceedings of Canadian Conference on Electrical and Computer Engineering, CCECE 1993., 332241, Canadian Conference on Electrical and Computer Engineering, Institute of Electrical and Electronics Engineers Inc., pp. 39-42, 1993 Canadian Conference on Electrical and Computer Engineering, CCECE 1993, Vancouver, Canada, 14/09/93. https://doi.org/10.1109/CCECE.1993.332241

Efficient systolic implementation of fixed-point state-space digital filter. / Tawfik, A.; El-Guibaly, F.; Agathoklis, P.
Proceedings of Canadian Conference on Electrical and Computer Engineering, CCECE 1993. Institute of Electrical and Electronics Engineers Inc., 1993. p. 39-42 332241 (Canadian Conference on Electrical and Computer Engineering).

Research output: Chapter in Book/Report/Conference proceeding › Conference contribution › peer-review

TY - GEN

T1 - Efficient systolic implementation of fixed-point state-space digital filter

AU - Tawfik, A.

AU - El-Guibaly, F.

AU - Agathoklis, P.

PY - 1993

Y1 - 1993

N2 - We present an efficient systolic implementation for N-order state-space IIR digital filters. The proposed systolic architecture provides an excellent performance in terms of area and speed. A comparison between the suggested systolic architecture and two other conventional architectures is also presented.

AB - We present an efficient systolic implementation for N-order state-space IIR digital filters. The proposed systolic architecture provides an excellent performance in terms of area and speed. A comparison between the suggested systolic architecture and two other conventional architectures is also presented.

UR - https://www.scopus.com/pages/publications/85047107611

U2 - 10.1109/CCECE.1993.332241

DO - 10.1109/CCECE.1993.332241

M3 - Conference contribution

AN - SCOPUS:85047107611

T3 - Canadian Conference on Electrical and Computer Engineering

SP - 39

EP - 42

BT - Proceedings of Canadian Conference on Electrical and Computer Engineering, CCECE 1993

PB - Institute of Electrical and Electronics Engineers Inc.

T2 - 1993 Canadian Conference on Electrical and Computer Engineering, CCECE 1993

Y2 - 14 September 1993 through 17 September 1993

ER -

Tawfik A, El-Guibaly F, Agathoklis P. Efficient systolic implementation of fixed-point state-space digital filter. In Proceedings of Canadian Conference on Electrical and Computer Engineering, CCECE 1993. Institute of Electrical and Electronics Engineers Inc. 1993. p. 39-42. 332241. (Canadian Conference on Electrical and Computer Engineering). doi: 10.1109/CCECE.1993.332241

Efficient systolic implementation of fixed-point state-space digital filter

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