@inproceedings{23e867444590492ea94fbd36583b678f,
title = "Analysis and optimization for dynamic read stability in 28nm SRAM bitcells",
abstract = "The importance of the dynamic analysis for SRAM operation increases as a result of shrinking access cycle time, voltage scaling and increased process variations. In this paper, quantitative study of the dynamic read noise margin (DNM) is introduced showing the evolution from the static read noise margin (SNM) to DNM through cumulative dynamic effects in 28nm FDSOI. The impact of parasitic capacitances on the DNM is further analyzed. Finally, we show that by sizing for a 150-mV DNM instead of a 150-mV SNM and by inserting two 0.5fF extra caps in the bitcell allows reducing the pull-down NMOS width by a factor 3.5×.",
keywords = "6T SRAM, Cell sizing, Dynamic behavior, FD SOI, Read Noise Margin, parasitic capacitances",
author = "Elthakeb, \{Ahmed T.\} and Thomas Haine and Denis Flandre and Yehea Ismail and Elhamid, \{Hamdy Abd\} and David Bol",
note = "Publisher Copyright: {\textcopyright} 2015 IEEE.; IEEE International Symposium on Circuits and Systems, ISCAS 2015 ; Conference date: 24-05-2015 Through 27-05-2015",
year = "2015",
month = jul,
day = "27",
doi = "10.1109/ISCAS.2015.7168908",
language = "English",
series = "Proceedings - IEEE International Symposium on Circuits and Systems",
publisher = "Institute of Electrical and Electronics Engineers Inc.",
pages = "1414--1417",
booktitle = "2015 IEEE International Symposium on Circuits and Systems, ISCAS 2015",
address = "United States",
}