A 3-bit pseudo-flash ADC for sensors interface circuits

A3-bit pseudo flash analog-to-digital converter (ADC) is presented in this paper. For scalability and compactness, the ADC was designed such that only two comparators were required. The complete system design has been implemented in hardware (i.e. PCB or breadboard) and fully characterized for a future implementation as an integrated circuit. The ADC achieved is less than 0.1 LSB for both INL and DNL and ENOB greater than 2.5 at 20 kHz. In this approach, lowering the component comparators has been targeted in order to reduce the power and silicon area for future integrated implementation.